In the field of semiconductor devices, the device density is increased and the device dimension is reduced, continuously. Conventionally, in the flip-chip attachment method, an array of solder bumps is formed on the surface of the die. The formation of the solder bumps may be carried out by using a solder composite material through a solder mask for producing a desired pattern of solder bumps. The function of chip package includes power distribution, signal distribution, heat dissipation, protection and support . . . and so on. As a semiconductor chip become more complicated, the traditional package technique, for example lead frame package, flex package, rigid package technique, can't meet the demand of producing smaller chip with high density elements on the chip. Wafer level package (WLP) technique is an advanced packaging technology, by which the dice are manufactured and tested on the wafer, and then the wafer is singulated by dicing for assembly in a surface-mount line. Because the wafer level package technique utilizes the whole wafer as one object, not utilizing a single chip or die, and therefore, before performing a scribing process, packaging and testing has been accomplished. Furthermore, WLP is such an advanced technique so that the process of wire bonding, die mount and under-fill can be omitted. By utilizing WLP technique, the cost and manufacturing time can be reduced, and the resulting structure of WLP can be equal to the die; therefore, this technique can meet the demands of miniaturization of electronic devices.
Currently, the flip chip technology used for the camera module is performed as a stud bump process on the entire wafer by a wire bonding equipment, whereby solder balls to being replaced by the stud bumps.
A CMOS image sensor is manufactured into a CMOS image sensor module from a CMOS image sensor chip by an electronic package technology. And it is applied into various goods and a package specification required by the CMOS image sensor module depends on characteristics of the finished goods. Especially, the recent tendencies of a CMOS image sensor module, namely, high electricity capabilities, miniaturization/high density, a low power consumption, multifunction, a high speed signal processing, a reliability are the representative characteristics of a miniaturization of the electronic goods.
Contrary to general CMOS chips, the CMOS image sensor in the past is feasible to a physical environment and can be polluted by the impurities, and a leadless chip carrier LCC type package is used when its size is not considered to be important. However, in a recent tendency of a market requiring for thin and simplified characteristics such as in a camera phone, smart phone, chip-on-board (COB), chip-on-film (COF), chip size package (CSP), etc. are generally used.
Current flip chip structure can reduce module height but flip chip machine is very expensive and low UPH (Unit Per Hour). So, the investment is very huge. And, yield is lower and not easy to be controlled.
Therefore, based-on the shortcomings of prior arts, the present invention provide a newly substrate inside type module structure, which has no need for new investment and the process yield will be better.